Add examples. Add more info to README
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37
examples/simple-counter/simple_counter.sv
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37
examples/simple-counter/simple_counter.sv
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`timescale 1ps/1ps
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`default_nettype none
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module simple_counter #(parameter COUNT = 16,
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localparam WIDTH = $clog2(COUNT-1)) // <-- ERROR
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(input wire clock,
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input wire reset,
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input wire i_inc,
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input wire i_dec,
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output reg [WIDTH-1:0] o_count);
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logic [WIDTH-1:0] count_next;
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always_comb
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case ({i_inc, i_dec})
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2'b01:
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if (o_count == '0)
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count_next = WIDTH'(COUNT-1);
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else
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count_next = o_count - 1'b1;
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2'b10:
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if (o_count == WIDTH'(COUNT-1))
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count_next = '0;
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else
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count_next = o_count + 1'b1;
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default: count_next = o_count;
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endcase
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always_ff @(posedge clock)
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if (reset) o_count <= '0;
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else o_count <= count_next;
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endmodule // simple_counter
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